Secondment via YER
About this vacancy
For VDL ETG, we are currently looking for the Senior FPGA Designer with minimum 8 years of experience in VHDL/FPGA Design.
You will be responsible for defining and realizing new VHDL firmware designs and for modifying existing VHDL firmware, including the hardware/software interface of the machine. Your activities include specifying and documenting requirements, implementing and simulating VHDL code as well as testing the firmware in test setups and in the machine module.
As a FPGA Designer you are the first point of contact for questions related to this topic. In the projects, you work together with the electronics architect and designers of all disciplines (software, electronics, mechatronics, mechanics).
This position is based in the Electronics group of VDL ETG Technology & Development, where you will report to the Group leader Electronics.
VDL Enabling Technologies Group (VDL ETG) is a tier-one design & contract manufacturing partner with worldwide activities, whose customers are 'Original Equipment Manufacturing' companies that play a leading role in high-tech production equipment and users of advanced production lines.
Within VDL ETG, the department Technology & Development (T&D) is responsible for the specification, design and integration of high tech/precision modules, professional products and capital intensive equipment. All this takes place under one roof. The high-tech production facility is equipped with state of the art machinery to produce any designed product.
The Technology & Development department consists of a number of competence groups, such as Mechanics, Mechatronics, Electronics, Physics & Manufacturing Technology, Software and Project management. In multi-disciplinary project teams we specify, design, develop and qualify the professional products for our customers. VDL ETG sources, produces and supplies the qualified products to our customers.
- Good employee benefits (e.g. work-life balance, pension, lease car, bonus model);
- Challenging assignments;
- Excellent guidance from your consultant and YER's back office;
- Development opportunities, including the YER Talent Development Programme with a personal coach;
- Intensive support for international candidates (including Dutch lessons, tax-return and accommodation assistance);
- Cooperative and results and relationship-driven;
- Friendly atmosphere and open culture;
- Community/network with other technology professionals from a variety of multinationals;
- Events and master classes with interesting speakers and attractive companies.
- Bachelor or Master degree in Electrical Engineering
- At least 8 years of industrial experience in VHDL for FPGA design (VHDL RTL, synthesis, compilation and timing closure).
- Experience with FPGA design flow (Altera Quartus/Xilinx ISE) and functional & gate level simulation using Mentor Modelsim and/or Questa Sim.
- Experience with FPGA debugging tools (ILA ChipScope, Signaltap) and lab equipment.
- Affinity to work and discuss with hardware and software engineers on a technical level.
- Team player, analytical, pragmatic, creative and pro-active
- Good communication skills and proficient in English and preferably in Dutch.
- Ambition for a broad personal development in the technology field.
- Good in time management and setting priorities.
- Affinity with mechatronics/control systems is a plus!