Embedded Logic and Firmware VHDL FPGA Designer

  • Job category Engineering
  • Employment Fulltime
  • Reference number VAC-10004205
  • Location Veldhoven
  • Contract type Secondment via YER
  • Industry High Tech

About this vacancy

Are you challenged by the VHDL/Firmware that is embedded in the ASML products? Do you have a Master’s Degree in Computer Sciences, Electrical Engineering or equivalent and some year experience in the design of VHDL/Firmware systems? We might be looking for you!

As a VHDL/Firmware Designer, your mission is to define, realize and maintain the realization of FPGA Firmware designs that belong to ASML’s company-internal library. This library is used to create and maintain electronics that is embedded in the ASML products.

Job description

The VHDL/Firmware Designer is responsible for the following:

  • Participate as a VHDL/Firmware designer in a multidisciplinary design team.
  • Define and document requirements for the VHDL/Firmware designs.
  • Perform trade-off studies to determine the preferred implementation scenario for new or changed functions.
  • Define, document and execute tests to ensure that the firmware satisfies the requirements.
  • Solve IP-block related issues and manage problem resolution during first system integration.
  • Contribute to analysis and solution of reliability issues.


ASML is a successful Dutch high-tech enterprise that produces complex lithography systems used by chip manufacturers in the production of integrated circuits. ASML is at the cutting edge of this technology and delivers systems to all the world's leading chip manufacturers. ASML's employees are among the most creative talents in the fields of physics, mathematics, chemistry, mechanical engineering and software. Every day they collaborate in close-knit multidisciplinary teams in which members listen to and learn from one another and exchange ideas. It is the ideal environment for professional development and personal growth.

ASML is headquartered in Veldhoven, the Netherlands.

Offer description

You will be employed by YER and seconded to ASML. We offer:

  • Good employee benefits (e.g. work-life balance, pension, lease car, bonus model)
  • Challenging assignments
  • Excellent guidance from your consultant and YER's back office
  • Development opportunities, including the YER Talent Development Programme with a personal coach
  • Intensive support for international candidates (including Dutch lessons, tax-return and accommodation assistance)
  • Cooperative and results and relationship-driven
  • Friendly atmosphere and open culture
  • Community/network with other technology professionals from a variety of multinationals
  • Events and master classes with interesting speakers and attractive companies

Candidate profile

  • Master degree in Computer Science, Electrical Engineering or equivalent.
  • Multiple years of experience in the VHDL design of programmable logic (candidates with Verilog experience can be considered too. Candidates that only have experience in programming C code or Matlab models are lesser suited).
  • Technical knowledge of Programmable Logic but also digital design in general.
  • Highly motivated pro-active team player with good social and communication skills.
  • Structured with eye for details and with quality in mind.
  • Fluent English in word and in writing (Dutch is convenient but not mandatory).